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CRUVI FPGA Card

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The CRUVI FPGA Card is a daughter card standard specifically tailored to the needs of FPGAs.

CRUVI FPGA Card Logo

Background

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The expansion bus interface is designed to create an open ecosystem of function modules for high-performance peripheral connectivity. Its main focus is on supporting FPGA and FPGA SoC devices from all major manufacturers like Altera, Lattice, Microchip and Xilinx.

The word "CRUVI" is a combination of the Estonian word "KRUVI" for screw and the letter "C", which refers to the half of the hexagonal screw head. In this case, the "K" was replaced with "C" to emphasize the reference to the screw head.

Overview

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It can be used to build high performance prototypes, for system integration and testing to build complex systems from smaller building blocks to iterate quickly and reduce cost. Create custom test systems for production functional testing.

The carrier module supplies the power supply, the input/output voltage and controls the functions of the peripheral modules.

The CRUVI open standard coexists between low speed, low pin-count like Pmod Interface devices and high-performance, high pin-count (HPC), 400 I/O FPGA Mezzanine Card (FMC) peripherals.

Three board-to-board connectors are specified: CRUVI-LS (Low Speed), CRUVI-HS (High Speed) and CRUVI-GT (Gigabit Transceiver) PCIe Gen 5.0 capable.

Bridging adapter exists to convert signals from Pmod to CRUVI-LS (CR00025), from FMC to CRUVI-HS (CR00101, CR00111) and FMC to CRUVI-GT (CR00112).

History of CRUVI specification

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International contributors to define the open source CRUVI specification are Trenz Electronic GmbH, Arrow Electronics, Samtec, Flinders University, Synaptic Laboratories Ltd, Symbiotic EDA and MicroFPGA UG.

Year Version Notes Refs
2021 1.0.7 -alpha first release
2024 2.0.1 -alpha CRUVI-GT (Gigabit Transceiver) [1]

CRUVI connector specification

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specification of connectors
LS Low Speed HS High Speed GT Gigabit Transceiver
Carrier side connector CLT-106-02-F-D-A-K SS4-30-3.50-L-D-K ADF6-20-03.5-L-4-2
3D STEP Model
Peripheral side connector TMMH-106-04-F-DV-A-M ST4-30-1.50-L-D-P ADM6-20-01.5-L-4-2
3D STEP Model
Pin no 12 (6 per row) 60 (30 per row) 80 (20 per row)
pitch [mm] / [inch] 2 / 0.787 0.4 / 0.016 0.635 / 0.025
stacked height [mm] / [inch] 4.78 to 5.29 /0.188 to 0.208 5 / 0.197
speed rating [GHz] / [Gbps] 5.5 / 11 13.5 / 27 (single ended)

15.5 / 31 (differential)

32
Single ended I/O pins (VCCIO) 8 37 (28 adj.) + (9 fixed 3.3V) 8 + I2C
max. differential I/O no max. 12 LVDS max. 4 lanes + REFCLK
Power Supply adjustable, 3.3V, 5V
Current rating per pin [A] 4.1 (2-pin powered) 1.6 (2-pin powered) 1.34 (4-pin powered)
max. Temperatur range [°C] -55 to 125

Structure and description of the carrier modules

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Single, double or triple width modules are allowed and they have more mounting holes.

A triple size of space on carrier board is 67.72 x 57.5 mm2 (2.66535 x 2.26378 inch²). There are 3 slots. The mounting holes (1 to 6) for M2 screws are 2.2 mm (0.0866 inch) diameter and need SMD spacer for mechanically fixing. The CR99201 PCB template has LS and HS connectors named: AX, BY and CZ. The CR99500[2] PCB template has LS, HS and GT connectors.

  • CRUVI carrier boards
  • AXE5-EAGLE development kit with Altera Agilex 5 E SoC FPGA and with HS LS CRUVI slots
    AXE5-EAGLE development kit with Altera Agilex 5 E SoC FPGA and with HS LS CRUVI slots
  • carrier board for Altera Stratix 10 SX FPGA SoC SOM with HS LS CRUVI slots
    carrier board for Altera Stratix 10 SX FPGA SoC SOM with HS LS CRUVI slots
  • carrier board with Altera Cyclone10 LP FPGA and with HS LS CRUVI slots
    carrier board with Altera Cyclone10 LP FPGA and with HS LS CRUVI slots
  • single, double and triple carrier board
  • carrier board with Altera MAX 10 FPGA
    carrier board with Altera MAX 10 FPGA
  • PCB-template CR99201
    PCB-template CR99201
  • carrier board with Altera Cyclone V FPGA
    carrier board with Altera Cyclone V FPGA
  • size of PCB-template CR99500
    size of PCB-template CR99500
  • PCB-template CR99500
    PCB-template CR99500
  • carrier board top view
    carrier board top view

Structure and description of the peripheral modules

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There are different single peripheral module possible, flexible and scalable by size LS, HS and GT connectors. Mounting holes are for M2 screws 2.2 mm (0.0866 inch) diameter.

Templates for the peripheral modules

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It is recommended to have EEPROM with I2C for identification of peripheral module with a specific address number.

CRUVI peripheral boards
L x H [mm2] / [inch²] speed PCB template [2] Note
14 x 14 / 0.55 x 0.55 LS CR99001 CRUVI PCB template CR99001 CR99002 14 x 14 LS

identification EEPROM is included; This template is useful for I2C, I3C, SPI sensor, I2S PDM MEMS microphones, programmable oscillator, ADC, DAC or SPI (QSPI) Flash memory device in BGA24 or SO-8 package.

14 x 14 / 0.55 x 0.55 LS CR99002 same as CR99001 with added u.Fl connectors for I/O
22 x 32 / 0.87 x 1.2598 LS CR99003 CRUVI PCB template CR99003 22 x 32 LS

maximum size one-wide half-length, identification EEPROM is included

18 x 32 / 0.71 x 1.26 LS CR99004 CRUVI PCB template CR99004 18 x 32 LS

This template is useful to convert into Pmod compatible connector (CR00005).

22 x 30 / 0.87 x 1.18 LS CR99005 CRUVI PCB template CR99005 22 x 30 LS

is half-length LS module with two SMA connectors

18 x 20 / 0.71 x 0.79 HS CR99101 CRUVI PCB template CR99101 18 x 20 HS

minimal size HS Module; good for HyperRAM or HyperFlash (CR00041), eMMC (CR00049) or loopback adapter for CRUVI-HS (CR00091)

22 x 57.5 / 0.87 x 2.26 HS CR99102 CRUVI PCB template CR99102 22 x 57.5 HS

maximum sized single-width HS module; good for signal test adapter to probed with scope or logic analyzer (CR00026), for high speed interfaces like USB-C, HDMI (CR00240), MIPI CSI/DSI, SDIO, xGMII Ethernet (CR0020x) and LVDS ADC (1 to 4 data lane)

22 x 57.5 / 0.87 x 2.26 GT CR99400 CRUVI PCB template CR99400 22 x 57.5 GT

This template is suitable for HDMI output (CR00240), JESD204B ADC (CR00401), loopback adapter for CRUVI-GT (CR00092)

Pinout and signal description

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CRUVI-LS pinout and signal description

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CRUVI-LS pinout and signal description
Pin Primary Signal Pin Primary Signal
1 SDA I2C(SDA), SMBUS(SDA) 7 D1 UART(RXD1), SD(D1), SPI(MISO), QSPI(D1), JTAG(TDI)
2 SCL I2C(SCL), SMBUS(SCL) 8 CLK UART(RTS), SD(CLK), SPI(CLK), QSPI(CLK), JTAG(TCK)
3 D3 UART(RST), SD(TXD0), QSPI(D3), JTAG(nRST) 9 D0 UART(TXD1), SD(D0), SPI(MOSI), QSPI(D0) JTAG(TDO)
4 SEL UART(CTS), SD(CMD), SPI(SEL), QSPI(SEL), JTAG(TMS) 10 VCC Power 3.3V
5 D2 SMBUS(INT), UART(RXD0), SD(D2), QSPI(D2), JTAG(RFU) 11 RFU tbd
6 GND Ground 12 VBUS Power 5V

CRUVI-HS pinout and signal description

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CRUVI-HS signal description
Pin Primary Function Note Pin Primary Function Note Pin Primary Function Note Pin Primary Function Note
1 RFU1 16 A0_N LVDS 31 GND Ground 46 A5_N LVDS
2 HSIO 17 B0_N LVDS 32 A3_P 47 B5_N LVDS
3 ALERT/IRQ 18 GND Ground 33 B3_P LVDS 48 GND Ground
4 VCC 3,3V 19 GND Ground 34 A3_N 49 GND Ground
5 SDA 20 A1_P LVDS 35 B3_N LVDS 50 RFU2_P
6 HSO 21 B1_P LVDS 36 VADJ 1.2 to 3.3V 51 DI/TDI JTAG, SPI(MISO)
7 SCL 22 A1_N LVDS 37 GND Ground 52 RFU2_N
8 HSRST 23 B1_N LVDS 38 A4_P LVDS 53 DO/TDO JTAG, SPI(MOSI)
9 VCC 3.3V 24 GND Ground 39 B4_P LVDS 54 GND Ground
10 HSI 25 GND Ground 40 A4_N LVDS 55 SEL/TMS JTAG, SPI(SEL)
11 REFCLK 26 A2_P 41 B4_N LVDS 56 RFU_P
12 GND Ground 27 B2_P LVDS 42 GND Ground 57 MODE JTAG EN
13 GND Ground 28 A2_N 43 GND Ground 58 RFU_N
14 A0_P LVDS 29 B2_N LVDS 44 A5_P LVDS 59 SCK/TCK JTAG, SPI(CLK)
15 B0_P LVDS 30 GND Ground 45 B5_P LVDS 60 VBUS 5V

CRUVI-GT pinout and signal description

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CRUVI-GT signal description
Pin Primary Function Note Pin Primary Function Note Pin Primary Function Note Pin Primary Function Note
A1 GND Ground B1 TCK JTAG C1 TDI JTAG D1 GND Ground
A2 TX3_N B2 TMS JTAG C2 TDO JTAG D2 RX3_N
A3 TX3_P B3 C3 D3 RX3_P
A4 GND Ground B4 C4 D4 GND Ground
A5 TX2_N B5 C5 D5 RX2_N
A6 TX2_P B6 C6 D1_N D6 RX2_P
A7 GND Ground B7 C7 D1_P D7 GND Ground
A8 B8 C8 D8 CLK0_N CLK
A9 B9 C9 D9 CLK0_P CLK
A10 B10 VADJ 1.2 to 3.3V C10 VCC_5V 5V D10 GND Ground
A11 B11 VCC_3.3V 3.3V C11 VCC_12V 12V D11 GND Ground
A12 B12 C12 D12 GBTCLK0_N CLK
A13 B13 C13 D13 GBTCLK0_P CLK
A14 GND Ground B14 C14 D0_N D14 GND Ground
A15 TX1_N B15 C15 D0_P D15 RX1_N
A16 TX1_P B16 S4_LS AUX IO C16 S7_LS AUX IO D16 RX1_P
A17 GND Ground B17 S5_LS AUX IO C17 S6_LS AUX IO D17 GND Ground
A18 TX0_N B18 S0_LS AUX IO C18 S3_LS AUX IO D18 RX0_N
A19 TX0_P B19 S1_LS AUX IO C19 S2_LS AUX IO D19 RX0_P
A20 GND Ground B20 SDA_LS SMBus C20 SCL_LS SMBUs D20 GND Ground

References

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  1. ^ "CRUVI specification v2.0.1 (2024)" (PDF). GitHub. Retrieved 2024-05-17.
  2. ^ a b "PCB template CRUVI boards". GitHub. Retrieved 2024-05-17.
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