MBus (SPARC)

MBus is a computer bus designed and implemented by Sun Microsystems for communication between high speed computer system components, such as the central processing unit, motherboard and main memory. SBus is used in the same machines to connect add-on cards to the motherboard.

MBus was first used in Sun's first multiprocessor SPARC-based system, the SPARCserver 600MP series (launched in 1991), and later found use in the SPARCstation 10 and SPARCstation 20 workstations. The bus permits the integration of several microprocessors on a single motherboard, in a multiprocessing configuration with up to eight CPUs packaged in detachable MBus modules. In practice, the number of processors per MBus is limited to four. Single processor systems were also sold that use the MBus protocol internally, but with the CPUs permanently attached to the motherboard to lower manufacturing costs.

MBus specifies a 64-bit datapath, which uses 36-bit physical addressing, giving an address space of 64 GB. The transfer rate is 80 MB/s sustained (320 MB/s peak) at 40 MHz, or 100 MB/s (400 MB/s peak) at 50 MHz. Bus controlling is done by an arbiter. Interrupt, reset, and timeout logic are also specified.

Related buses

Several related buses were also developed:

XBus

XBus is a packet-switched bus used in the SPARCserver 1000, SPARCcenter 2000 and Cray CS6400. This corresponds to the circuit-switched MBus, with identical electrical characteristics and physical form factor but an incompatible signalling protocol.

KBus

KBus is a high-speed interconnection system for linking multiple MBuses, used in Solbourne Computer Series 6 and Series 7 computer systems.

History

The MBus standard was cooperatively developed by Sun and Ross Technology and released in 1991.^[1]

Manufacturers who produced computer systems using the MBus included Sun, Ross Technology, Hyundai/Axil, Fujitsu, Solbourne Computer, Tatung, GCS, Auspex, ITRI, ICL, Cray, Amdahl, Themis, DTK and Kamstrup.

References

^ "HyperSPARC goes Hollywood; Pixar uses HyperSPARC microprocessors from Ross Technology to create final rendering of 'Toy Story'" Archived 2012-10-20 at the Wayback Machine.

External links

[1] "HyperSPARC goes Hollywood; Pixar uses HyperSPARC microprocessors from Ross Technology to create final rendering of 'Toy Story'" Archived 2012-10-20 at the Wayback Machine.

[1]

v t e Technical and de facto standards for wired computer buses
General	System bus Front-side bus Back-side bus Daisy chain Control bus Address bus Bus contention Bus mastering Network on a chip Plug and play List of bus bandwidths
Standards	SS-50 bus S-100 bus Multibus Unibus VAXBI MBus STD Bus SMBus Q-Bus Europe Card Bus ISA STEbus Zorro II Zorro III CAMAC FASTBUS LPC HP Precision Bus EISA VME VXI VXS VPX NuBus TURBOchannel MCA SBus VLB HP GSC bus InfiniBand Ethernet UPA PCI PCI Extended (PCI-X) PXI PCI Express (PCIe) AGP Compute Express Link (CXL) Direct Media Interface (DMI) RapidIO Intel QuickPath Interconnect NVLink HyperTransport Infinity Fabric Intel Ultra Path Interconnect Coherent Accelerator Processor Interface (CAPI) SpaceWire
Storage	ST-506 ESDI IPI SMD Parallel ATA (PATA) Bus and Tag DSSI HIPPI Serial ATA (SATA) SCSI Parallel SAS ESCON Fibre Channel SSA SATAe PCI Express (via AHCI or NVMe logical device interface)
Peripheral	Apple Desktop Bus Atari SIO DCB Commodore bus HP-IL HIL MIDI RS-232 RS-422 RS-423 RS-485 Lightning DMX512-A IEEE-488 (GPIB) IEEE-1284 (parallel port) IEEE-1394 (FireWire) UNI/O 1-Wire I²C (ACCESS.bus, PMBus, SMBus) I3C SPI D²B Parallel SCSI Profibus USB Camera Link External PCIe Thunderbolt
Audio	ADAT Lightpipe AES3 Intel HD Audio I²S MADI McASP S/PDIF TOSLINK
Portable	PC Card ExpressCard
Embedded	Multidrop bus CoreConnect AMBA (AXI) Wishbone SLIMbus
Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest. Category